1 power mosfet IRF830A, sihf830a features ? low gate charge q g results in simple drive requirement ? improved gate, avalanche and dynamic dv/dt ruggedness ? fully characterized capacitance and avalanche voltage and current ? effective c oss specified ? lead (pb)-free available applications ? switch mode power supply (smps) ? uninterruptable power supply ? high speed power switching typical smps topologies ? two transistor forward ? half bridge ? full bridge notes a. repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. starting t j = 25 c, l = 18 mh, r g = 25 , i as = 5.0 a (see fig. 12). c. i sd 5.0 a, di/dt 370 a/s, v dd v ds , t j 150 c. d. 1.6 mm from case. product summary v ds (v) 500 r ds(on) ( )v gs = 10 v 1.4 q g (max.) (nc) 24 q gs (nc) 6.3 q gd (nc) 11 configuration single n - c hannel m os fet g d s to-220 g d s a v aila b le rohs* compliant ordering information package to-220 lead (pb)-free IRF830Apbf sihf830a-e3 snpb IRF830A sihf830a absolute maximum ratings t c = 25 c, unless otherwise noted parameter symbol limit unit drain-source voltage v ds 500 v gate-source voltage v gs 30 continuous drain current v gs at 10 v t c = 25 c i d 5.0 a t c = 100 c 3.2 pulsed drain current a i dm 20 linear derating factor 0.59 w/c single pulse avalanche energy b e as 230 mj repetitive avalanche current a i ar 5.0 a repetitive avalanche energy a e ar 7.4 mj maximum power dissipation t c = 25 c p d 74 w peak diode recovery dv/dt c dv/dt 5.3 v/ns operating junction and storage temperature range t j , t stg - 55 to + 150 c soldering recommendations (p eak temperature) for 10 s 300 d mounting torque 6-32 or m3 screw 10 lbf in 1.1 n m www.kersemi.com
2 IRF830A, sihf830a notes a. repetitive rating; pulse width limited by maximum junction temper ature (see fig. 11). b. pulse width 300 s; duty cycle 2 %. c. c oss eff. is a fixed capacitance that gi ves the same charging time as c oss while v ds is rising from 0 to 80 % v ds . thermal resistance ratings parameter symbol typ. max. unit maximum junction-to-ambient r thja -62 c/w case-to-sink, flat, greased surface r thcs 0.50 - maximum junction-to-case (drain) r thjc -1.7 specifications t j = 25 c, unless otherwise noted parameter symbol test conditions min. typ. max. unit static drain-source breakdown voltage v ds v gs = 0 v, i d = 250 a 500 - - v v ds temperature coefficient v ds /t j reference to 25 c, i d = 1 ma - 0.60 - v/c gate-source threshold voltage v gs(th) v ds = v gs , i d = 250 a 2.0 - 4.5 v gate-source leakage i gss v gs = 30 v - - 100 na zero gate voltage drain current i dss v ds = 500 v, v gs = 0 v - - 25 a v ds = 400 v, v gs = 0 v, t j = 125 c - - 250 drain-source on-state resistance r ds(on) v gs = 10 v i d = 3.0 a b -- 1.4 forward transconductance g fs v ds = 50 v, i d = 3.0 a b 2.8 - - s dynamic input capacitance c iss v gs = 0 v, v ds = 25 v, f = 1.0 mhz, see fig. 5 -620- pf output capacitance c oss -93- reverse transfer capacitance c rss -4.3- output capacitance c oss v gs = 0 v; v ds = 1.0 v, f = 1.0 mhz 886 output capacitance c oss v gs = 0 v; v ds = 400 v, f = 1.0 mhz 27 effective output capacitance c oss eff. v gs = 0 v; v ds = 0 v to 400 v c 39 total gate charge q g v gs = 10 v i d = 5.0 a, v ds = 400 v, see fig. 6 and 13 b --24 nc gate-source charge q gs --6.3 gate-drain charge q gd --11 turn-on delay time t d(on) v dd = 250 v, i d = 5.0 a, r g = 14 , r d = 49 , see fig. 10 b -10- ns rise time t r -21- turn-off delay time t d(off) -21- fall time t f -15- drain-source body diode characteristics continuous source-drain diode current i s mosfet symbol showing the integral reverse p - n junction diode --5.0 a pulsed diode forward current a i sm --20 body diode voltage v sd t j = 25 c, i s = 5.0 a, v gs = 0 v b -- 1.5 v body diode reverse recovery time t rr t j = 25 c, i f = 5.0 a, di/dt = 100 a/s b - 430 650 ns body diode reverse recovery charge q rr - 1.62 2.4 c forward turn-on time t on intrinsic turn-on time is negli gible (turn-on is dominated by l s and l d ) s d g www.kersemi.com
3 IRF830A, sihf830a typical characteristics 25 c, unless otherwise noted fig. 1 - typical output characteristics fig. 2 - typical output characteristics fig. 3 - typical transfer characteristics fig. 4 - normalized on-resistance vs. temperature www.kersemi.com
4 IRF830A, sihf830a fig. 5 - typical capacitance vs. drain-to-source voltage fig. 6 - typical gate charge vs. gate-to-source voltage fig. 7 - typical source-drain diode forward voltage fig. 8 - maximum safe operating area www.kersemi.com
5 IRF830A, sihf830a fig. 9 - maximum drain current vs. case temperature fig. 10a - switching time test circuit fig. 10b - switching time waveforms fig. 11 - maximum effective transient thermal impedance, junction-to-case fig. 12a - unclamped inductive test circui t fig. 12b - unclamped inductive waveforms p u lse w idth 1 s d u ty factor 0.1 % r d v gs r g d.u.t. 10 v + - v ds v dd v ds 90 % 10 % v gs t d(on) t r t d(off) t f 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 n otes: 1. d u ty factor d = t / t 2. peak t = p x z + t 1 2 j dm thjc c p t t dm 1 2 t , rectang u lar p u lse d u ration (sec) thermal response (z ) 1 thjc 0.01 0.02 0.05 0.10 0.20 d = 0.50 si n gle pulse (thermal respo n se) a r g i as 0.01 t p d.u.t. l v ds + - v dd dri v er 15 v 20 v i as v ds t p www.kersemi.com
6 IRF830A, sihf830a fig. 12c - maximum avalanche energy vs. drain current fig. 13a - basic gate charge waveform fig. 12d - typical drain-to-source voltage vs. avalanche current fig. 13b - gate charge test circuit q gs q gd q g v g charge 10 v d.u.t. 3 ma v gs v ds i g i d 0.3 f 0.2 f 50 k 12 v c u rrent reg u lator c u rrent sampling resistors same type as d.u.t. + - www.kersemi.com
7 IRF830A, sihf830a fig. 14 - for n-channel p. w . period di/dt diode reco v ery d v /dt ripple 5 % body diode for w ard drop re-applied v oltage re v erse reco v ery c u rrent body diode for w ard c u rrent v gs = 10 v * v dd i sd dri v er gate dri v e d.u.t. i sd w a v eform d.u.t. v ds w a v eform ind u ctor c u rrent d = p. w . period + - + + + - - - * v gs = 5 v for logic le v el de v ices peak diode recovery dv/dt test circuit v dd ? d v /dt controlled b y r g ? dri v er same type as d.u.t. ? i sd controlled b y d u ty factor "d" ? d.u.t. - de v ice u nder test d.u.t. circ u it layo u t considerations ? lo w stray ind u ctance ? gro u nd plane ? lo w leakage ind u ctance c u rrent transformer r g www.kersemi.com
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